Pavan Sai. G, Binsu J Kailath, "Heart Rate Classification Using TSTDP with BCM Characteristics" Accepted for presentation at the IEEE ICCSS 2021 (IEEE 4th International Conference on Circuits, Systems and Simulation), to be held in hybrid mode from Malaysia, during May 26-28, 2021.
Sathiya Jothi, Binsu J Kailath, "Bistable-Triplet STDP Circuit Without External Memory for Integrating With Silicon Neurons" Proceedings of the IEEE World AIIOT Congress held virtually from USA, 10 - 13 May, 2021
Madhuvanthi Srivastav R, Binsu J Kailath, "Novel Biphasic Neuron Encoder Implementation", Proceedings of the IEEE World AIIOT Congress held virtually from USA, 10 - 13 May, 2021 (Won the BEST PAPER AWARD)
Ippili Satyaraj, Binsu J Kailath, "A simple PSTDP circuit for Analog Implementation of Spiking Neural Networks", 4th IEEE CICT (Conference on Information and Communication Technology) 2020, held from 3rd - 5th Dec 2020 at Chennai, India
Shivangi TP, Masoumeh Rahimi, Gaetano Gargiulo, Binsu J Kailath and Tara Julia Hamilton, "A Silicon Neuron-based Bio-Front-End for Ultra Low Power Bio-Monitoring at the Edge" Proceedings of the 2020 IEEE Symposium Series on Computational Intelligence (SSCI) held in Canberrra, Australia, 1st - 4th Dec. 2020, pp 3043 - 3048.
Sai G. Pavan; Binsu J Kailath, "Reusable Spiking Neural Network Architecture", 2020 11th IEEE Annual Ubiquitous Computing, Electronics & Mobile Communication Conference (UEMCON); New York, USA; 28th - 31st Oct 2020 (Won both BEST PAPER and BEST PRESENTER Awards).
Madhuvanthi Srivastav R, Binsu J Kailath, "Energy-Efficient Adaptive Exponential Integrate and Fire Neuron" Poster Presentation at 2020 IBM IEEE CAS/EDS - AI Compute Symposium, 21 - 22 Oct 2020, New York, USA
Sathiya Jothi, Binsu J Kailath, "Bistable-Triplet STDP circuit without external memory for Integrating with Silicon Neurons", Poster Presentation at 2020 IBM IEEE CAS/EDS - AI Compute Symposium, 21 - 22 Oct 2020, New York, USA
G Pavan Sai, Binsu J Kailath, "Reusable Spiking Neural Network Architecture", Poster Presentation at 2020 IBM IEEE CAS/EDS - AI Compute Symposium, 21 - 22 Oct 2020, New York, USA
Amrutha Manoharan, Gadamsetty Muralidhar, Binsu J Kailath, ’A Novel Method to Implement STDP Learning Rule in Verilog’, IEEE Region 10 Symposium (TENSYMP), 5-7 June 2020, Dhaka, Bangladesh (Won BEST PAPER Award).
Nithya K, Muralidhar Gadamsetty and Binsu J Kailath, “FPGA Implementation of Speech Recognizer for Isolated Words”, accepted for Lecture presentation at 2019 IEEE 5th International Symposium on Smart Electronic Systems (iSES), Rourkela, India, 16-18 Dec, 2019.
Muralidhar Gadamsetty and Binsu J Kailath, “The Simplest and Efficient Form of Spiking Neuron", accepted for Lecture presentation at 2019 IEEE Asia Pacific Conference on Circuits and Systems, to be held in Bangkok, Thailand from November 11-14, 2019 (Won BEST PAPER Award).
Manne Sai Sravan, Sudha Natarajan, Eswar Sai Krishna, Binsu J Kailath (2018) “Fast and accurate on-road vehicle detection based on color intensity segregation” “International Conference on Robotics and Smart Manufacturing (RoSMa2018), 19 – 21 July 2018, Chennai
Monisha Yuvaraj, Nandita Bhaskhar and Binsu J Kailath (2017) "Design of an Optimized MAC Unit using Integrated Vedic Multiplier", Accepted for ICMDCS, to be held in VIT Vellore, from 10th - 12th August 2017
Vani Mrudula Magapati and Binsu J Kailath (2017) "Switched Capacitor Circuit Simulator for Noise Analysis Using Adjoint Network Approach" Accepted for ICMDCS, to be held in VIT Vellore, from 10th - 12th August 2017
Dheepika K, Jevashankari S, Vippin Chandhar and Binsu J Kailath (2017): "Realization of Multiplier using Delay Efficient Cyclic Redundant Adder" Accepted for VDAT 2017 to be held in IIT Roorkee from 28th June to 2nd July, 2017
Binsu J. Kailath, G. Dinesh, “QSCsim — Charge Based Switched Capacitor Simulator”, Special Session in 2016 IEEE International Symposium on Nanoelectronic and Information Systems (iNIS), 19-21 Dec. 2016, Page: 284
E.Papanasam, Binsu J Kailath, "Effect of Post Metallization Annealing on the Electrical Characteristics of Pd/HfO2/6H-SiC MIS Capacitors and Extraction of Conduction Mechanisms," IEEE 3rd International Conference on Emerging Electronics (ICEE), Dec 2016, IIT Bombay
Majeed K. K. and Binsu J. Kailath, “Analysis and Design of Low Power Nonlinear PFD architectures for a Fast Locking PLL,'' IEEE TECHSYM 2016, IIT Kharagpur, 27th Sep 2nd Oct 2016 (Won the Industry Ready Technology Award)
Sriramprasath, Sudha Natarajan and Binsu J Kailath, “Accelerating Occupancy Grid Map Computation with GPU for Real-Time Obstacle Detection, 22ndannual International Conference on Advanced Computing and Communications (ADCOM 2016) at Bangalore during 8th -10th September 2016.
Karthikeyan Saravanan, G.Dinesh and Binsu J Kailath, “Improved Alias Rejection Using Interleaved CIC Decimation Filter,” presented in IEEE 14th International NEWCAS Conference in Vancouver, Canada, June 26-29, 2016.
Muralidhar Gadamsetty, G.Dinesh and Binsu J Kailath, "Switched Capacitor Circuit Simulator in Q-V Domain including Non Idealities“, presented in 20th VLSI Design and Test Symposium (VDAT-2016), IIT Guwahati, May 24-27, 2016.
Abdul Majeed K K and Binsu J Kailath, "CMOS Current Starved Voltage Controlled Oscillator Circuit for a Fast Locking PLL" (2015) in the 12th IEEE India International Conference, INDICON 2015, held in New Delhi from 17th to 20th Dec 2015 (Won Best Paper Award)
Abhay Kumar and Binsu J Kailath, “Design of 3stage high frequency CMOS voltage controlled oscillator”, IEEE EDSSC 2015, IEEE International Conference on Electron Devices and Solid-State Circuits held from 1stto 4th June, 2015 in NTU, Singapore
E.Papanasam, Binsu J Kailath, “Realization of silicon carbide MIS capacitors with high-K and high-K stack dielectric,” IEEE 12th International conference on solid state and integrated circuit technology (ICSICT)2014, Guilin, China
Abdul Majeed K K and Binsu J Kailath, “A Novel Phase Frequency Detector for a High Frequency PLL Design” (2013)International Conference on Design and Manufacturing, IConDM 2013at Indian Institute of Information Technology Design and Manufacturing (IIITD&M) Kancheepuram, Chennai, India-600127 held from 18th- 20th July 2013
Abdul Majeed K.K. and Binsu J Kailath, “Low power, High Frequency, Free Dead Zone PFD for a PLL Design, (2013)IEEE Faible Tension FaibleConsommation (Low Voltage Low Power) Conference held in Paris, France from 20th – 21st June 2013
S. Deepak and Binsu J Kailath, Optimized MAC unit design, (2012)IEEE EDSSC 2012, IEEE International Conference on Electron Devices and Solid-State Circuits held from December 3-5, 2012 in Bangkok, Thailand
HarikrishnanGopalakrishnan, Binsu J Kailath, (2012) “MIM Capacitors with stacked dielectrics” Presented in the International Conference “Tech Connect world 2012” held from 18th to 21st June 2012 in Santa Clara, USA
Kalaiselvi, K., Binsu J KailathDasGupta, A., and DasGupta, N. (2009): Ultra thin gate oxide by RTO followed by Anodization, in the Proceedings of the 15th International Workshop on Physics of Semiconductor Devices (IWPSD), Delhi, India, December 2009.
Binsu J KailathDasGupta, N. and DasGupta, A. (2009) Ultra Thin Oxide by Chemical Vapour Oxidation of Si,ECI International Conference on Semiconductor Technology for Ultra Large Scale Integrated Circuits and Thin Film Transistors, Xian, China, July-August 2009
Binsu J Kailath,DasGupta, N., DasGupta, A., Bhattacharya, S., Armstrong, B.M., Gamble H.S., and McCarthy, J. (2007): Novel low temperature techniques for growth of ultrathin oxides for Strained Si MOS Devices. Proceedings of the 19th IEEE International Conference on Microelectronics (ICM), Cairo, Egypt, December 2007, 429-432.
Binsu J Kailath Bhattacharya, S., DasGupta, A., DasGupta, N., McNeill, D.W. and Gamble, H. (2007): Effect of Nitridation on Al/HfO2/Ge MIS Capacitors. Proceedings of the 14th International Workshop on Physics of Semiconductor Devices (IWPSD), Bombay, India, December 2007, 194-197.
Binsu J KailathDasGupta, N. and DasGupta, A. (2007) Improved Electrical Characteristics of MOS devices with gate oxide grown by chemical oxidation. ECI International Conference on Semiconductor Technology for Ultra Large Scale Integrated Circuits and Thin Film Transistors, Barga, Italy, July-August 2007.
Binsu J KailathDasGupta, N. and DasGupta, A. (2006): Improved Reliability Characteristics for thermally grown ultrathin gate oxide by optimized anodic oxidation. Proceedings of the International Conference on Reliability and Safety Engineering, Chennai, India, December 2006, 508-514.
Binsu J KailathMarathe, V.G., DasGupta, N. and DasGupta, A. (2005): Studies on Chemical oxidation of Silicon with Nitric Acid. Proceedings of the 13th International Workshop on Physics of Semiconductor Devices (IWPSD), New Delhi, India, December 2005, 701-704.
Binsu J KailathDasGupta, N., DasGupta, A., Bhattacharya, S., Armstrong, B.M., Gamble H.S., Misra, Pankaj and Kukreja, L.M. (2005): Electrical Characterisation of Al/SiO2-TiO2/Strained Si/Relaxed SiGe MTOS Capacitors. International Conference on MEMS and Nanotechnology, Kharagpur, India, December 2005.