Faculty

Dr. Noor Mahammad SK

Associate Professor

E-mail: noor@iiitdm.ac.in | Ph: +91-44-27476349 | Room No: B3, PEMS Block

Link to Personal Hom: http://web.iiitdm.ac.in/noor/

Education

Indian Institute of Technology Madras

Chennai

Ph.D. in Computer Scienece and Engineering

2005 - 2009

National Institute of Electronics and Information Technology Aurangabad

Aurangabad

M.Tech. in Electronics Design Technology

2001 - 2003

NBKR Institute of Science and Technology, Vidyanagar, Sri Venkateswara University

Tirupati

B.Tech. in Electronics and Communication Engineering

1997 - 2001

Specialization

  1. Computer Scienece and Engineering

  2. Link: http://web.iiitdm.ac.in/noor/

Research Interests

  1. Software for VLSI Design

  2. Evolvable Hardware

  3. Reconfigurable Computing

  4. Network System Design

  5. High Performance VLSI Architectures for Digital Signal Processing

  6. Packet Processing Architectures and Algorithms

  7. Computer Architecture

Honours + Awards + Recognitions

  1. http://web.iiitdm.ac.in/noor/

Work Experience

Teaching

  1. http://web.iiitdm.ac.in/noor/

Research

  1. http://web.iiitdm.ac.in/noor/

Industry

  1. http://web.iiitdm.ac.in/noor/

Professional Membership

  1. http://web.iiitdm.ac.in/noor/

Professional Service

  1. http://web.iiitdm.ac.in/noor/

Teaching

  1. Computer Organization and Design

  2. Operating Systems

  3. Computer Networks

  4. Computer Architecture

  5. Digital Logic Design

  6. VLSI Design

  7. Interfacing Through Microprocessors

  8. Network System Design

  9. Network and Computer Security

  10. Digital System Testing and Testable Designs

  11. Digital Signal Processing and Processors

  12. CPLD and FPGA Architectures and Applications

  13. Modeling and Synthesis of Verilog HDLs

  14. ASIC Design

  15. Scripting Languages for VLSI Design Automation

Books

  1. http://web.iiitdm.ac.in/noor/

Journal Publications

  1. Mohamed Asan Basiri M and Noor Mahammad Sk, "High speed multiplexer design using tree based decomposition algorithm", Microelectronics Journal, Vol. 51, pp. 99-111, May 2016.[SCI Indexed]

  2. Mohamed Asan Basiri M and Noor Mahammad Sk, "Multi-mode parallel and folded VLSI architectures for 1D-fast Fourier transform", Integration, the VLSI Journal, Vol. 55, pp. 43-56, September 2016. [SCI Indexed]

  3. Mohamed Asan Basiri M and Noor Mahammad Sk, "Configurable Folded IIR Filter Design", IEEE Transactions on Circuits and Systems II: Express Briefs, Vol. 62, no. 12, pp. 1144-1148, December 2015. [SCI Indexed]

  4. Mohamed Asan Basiri M and Noor Mahammad Sk, "An Efficient Hardware-Based Higher Radix Floating Point MAC Design", ACM Transactions on Design Automation of Electronic Systems, Vol. 20, No. 1, Article 15, Pub. date: November 2014. [SCI Indexed]

  5. S. Veeramani and Sk Noor Mahammad, "Efficient IP lookup using hybrid trie-based partitioning of TCAM-based open flow switches",Journal of Photonic Network Communications, Springer Publisher, Vol.28, no. 2, pp.135-145, 2014. [SCI Indexed]

  6. P. Praveen Kumar and Sk. Noor Mahammad, "SDR based Multi Data Communication System Design", in Elsevier Procedia Engineering, Vol. 64, pp. 104-114 2013. [SCOPUS Indexed]

  7. Shanmuga Kumar M., Mohamed Asan Basiri M and Noor Mahammad Sk, "High Precision and High Speed Handheld Scientific Calculator Design Using Hardware based CORDIC Algorithm", in Elsevier Procedia Engineering, Vol. 64, pp. 56-64, 2013. [SCOPUS Indexed]

  8. Mohammed Shoaib, Noor Mahammad Sk and V Kamakoti, "Hardware Based Genetic Evolution of Self-Adaptive Arbitrary Response FIR Filter", in International Journal of Applied Soft Computing, Vol.11, No. 1, pp. 842-854, 2011. [SCI Indexed]

  9. Sk Noor Mahammad and V Kamakoti, "Constructing Online Testable Circuits using Reversible Logic", in IEEE Transactions on Instrumentation and Measurements, Vol. 59 No.1, pp. 101-109, 2010. [SCI Indexed]

Conference Publications

  1. Mohamed Asan Basiri M and Noor Mahammad Sk, "An Efficient VLSI Architecture for Discrete Hadamard Transform", in the proceedings of the 29th IEEE International Conference on VLSI Design and 15th International Conference on Embedded Systems (VLSID), pp. 140-145 Kolkata, January 2016.

  2. Sai Hemanth, Gantasala and Noor Mahammad, Sk, "An Efficient Virtualization Server Infrastructure for e-Schools of India", in the Proceedings of Third International Conference on Information Systems Design and Intelligent Applications (INDIA 2016), Volume 2, pp. 89-99, January 2016.

  3. Sai Charan, Addanki, Srinivasaverma, Vegesna S. M. and Noor Mahammad, Sk, "Lifeline System for Fisherman", Microelectronics, Electromagnetics and Telecommunications: Proceedings of ICMEET 2015, pp. 583--592, December 2015.

  4. S. Dinesh Kumar, and Noor Mahammad Sk, A Novel Adiabatic SRAM Cell Implementation using Split Level Charge Recovery Logic", in the proceedings of $19^{th}$ IEEE International Symposium on VLSI Design and Test (VDAT), pp. 1-2, June 2015.

  5. S. Dinesh Kumar and Sk Noor Mahammad, "A Novel Ternary Content-Addressable Memory (TCAM) Design Using Reversible Logic", in the proceedings of $28^{th}$ IEEE International Conference on VLSI Design (VLSID), pp. 316-320, Bengalore, Jan. 2015.

  6. S. Dinesh Kumar and Sk. Noor Mahammad, "A Novel SRAM Cell Design Using Reversible Logic", in the proceedings of 3rd International Conference on Eco-friendly Computing and Communication Systems (ICECCS 2014), Surathkal, Dec 2014.

  7. S. Dinesh Kumar and Sk. Noor Mahammad, "A Novel Binary Content Addressable Memory Design using Reversible Logic", in the proceedings of the International Conference on Computing and Communication Technologies (ICCCT 2014), pp. 1-5, Hyderabad, Dec 2014.

  8. M. Mohamed Asan Basiri, and SK Noor Mahammad. "Memory Based Multiplier Design in Custom and FPGA Implementation", Advances in Intelligent Informatics (3rd International Symposium on Intelligent Informatics 2014), Springer International Publishing, pp. 253-265, New Delhi, 2015. [ISI, SCOPUS Indexed]

  9. Asan Basiri M., Samaresh Chandra Nayak, and Noor Mahammad Sk, "Multiplication Acceleration through Quarter Precision Wallace Tree Multiplier", in the proceedings of IEEE International Conference on Signal Processing and Integrated Networks (SPIN), pp. 502-505, New Delhi, February, 2014.

  10. Harshit Srivastava and Noor Mahammad Sk, "A novel Flexible Baseband Processor Architecture Framework", in the proceedings of IEEE International Conference on Signal Processing and Integrated Networks (SPIN), pp. 511-516, New Delhi, February, 2014.

  11. Asan Basiri M and Noor Mahammad Sk, "An efficient hardware based MAC design in digital filters with complex numbers", in the proceedings of IEEE International Conference on Signal Processing and Integrated Networks (SPIN), pp. 475-480, New Delhi, February, 2014.

  12. Sagarika Mohanty and Noor Mahammad Sk, "A novel Interleaver Design for Multimode Communication in WLAN", in the proceedings of IEEE International Conference on Signal Processing and Integrated Networks (SPIN), pp. 286-290, New Delhi, February, 2014.

  13. Veeramani S, Manas Kumar, and Sk Noor Mahammad, "Hybrid Trie based Partitioning of TCAM based Openflow Switches", in the proceedings of 7th IEEE International Conference on Advanced Networks and Telecommunications Systems (ANTS), pp. 1-5, Chennai, December 2013.

  14. Veeramani S, S Rahul Sharma and Sk Noor Mahammad, "Constructing scalable hierarchical switched openflow network using adaptive replacement of flow table management", in the proceedings of 7th IEEE International Conference on Advanced Networks and Telecommunications Systems (ANTS), pp. 1-3, Chennai, December 2013.

  15. Veeramani S, Biraja Nalini Rout, and Noor Mahammad Sk, "Novel Approach to Secure Channel using C-SCAN and microcontroller in Openflow, in the proceedings of 7th IEEE International Conference on Advanced Networks and Telecommunications Systems (ANTS), pp. 1-4, Chennai, December 2013.

  16. Veeramani S, Manas Kumar, and Sk Noor Mahammad, "Minimization of flow table for TCAM based Openflow Switches by Virtual Compression Approach", in the proceedings of 7th IEEE International Conference on Advanced Networks and Telecommunications Systems (ANTS), pp. 1-4, Chennai, December 2013.

  17. K Shravan Kumar, S A Srinivasa Moorthy, Noor Mahammad Sk, "Design of low cost programmable DC power supply unit",in the proceedings of International Conference on Control, Automation, Robotics and Embedded Systems (CARE 2013), pp.1-5, Jabalpur, Dec. 2013.

  18. Praveen Kumar P and Noor Mohammad Sk, "Reconfigurable baseband modulator for Software Defined Radio", in the proceedings of IEEE International Conference on Information \& Communication Technologies (ICT 2013), pp. 189-193, Nagarcoil, April 2013.

  19. Gangothri, T. Manasa, P. K. Sumitha, S. A. S. Moorthy, K. Selvajyothi, and Sk Noor Mahammad, "Design of compact controller and power module for corrosion and marine growth prevention", in the proceedings of 7th IEEE International Conference on Industrial and Information Systems (ICIIS), pp. 1-6, Chennai, August 2012.

  20. Karthik K S, Shyam S, Ramasubramanian N, Shoaib M, Noor Mahammad Sk and Kamakoti V, "A SEU Tolerant CLB RAM for In-Circuit Reconfiguration", in the proceedings of the 12Th IEEE International VLSI Design and Test Symposium (VDAT' 08), pp. 228-238, Bangalore, India, July 2008.

  21. Mohammed Shoaib, Noor Mahammad Sk and Kamakoti V, "A Genetic Approach to Gateless Custom VLSI Design Flow", in the proceedings of 19Th IEEE International Conference on Microelctronics, pp XII-XVIII, Cairo, Egypt, December 2007.

  22. Hari Siva Kumar Sastry, Shyam Shroff, Noor Mahammad Sk and Kamakoti V, "Efficient Building Blocks for Reversible Sequential Circuit Design", in the proceedings of the 49Th IEEE International Midwest Symposium on Circuits and Systems, (MWSCAS'06), pp 437-441, August 2006.

  23. Noor Mahammad Sk, Siva Kumar Sastry H, Shyam Shroff and Kamakoti V, "Constructing Online Testable Circuits using Reversible Logic", in the proceedings of 10Th IEEE International VLSI Design and Test Symposium (VDAT 2006), pp 373-383, Goa, India, August 2006.

  24. Noor Mahammad Sk, Chandrasekhar V, Muralidaran V, Kamakoti V and Vijaykrishnan N, "Reduced Triple Modular Redundancy for Tolerating SEUs in SRAM-based FPGAs", in the proceedings of the 8Th annual MAPLD International Conference on Programmable Logic Devices and Technologies, paper no. 204, Washington D.C., USA. September 2005. Organized by NASA, USA.

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