Mohamed Asan Basiri M and Noor Mahammad Sk, "An Efficient VLSI Architecture for Discrete Hadamard Transform", in the proceedings of the 29th IEEE International Conference on VLSI Design and 15th International Conference on Embedded Systems (VLSID), pp. 140-145 Kolkata, January 2016.
Sai Hemanth, Gantasala and Noor Mahammad, Sk, "An Efficient Virtualization Server Infrastructure for e-Schools of India", in the Proceedings of Third International Conference on Information Systems Design and Intelligent Applications (INDIA 2016), Volume 2, pp. 89-99, January 2016.
Sai Charan, Addanki, Srinivasaverma, Vegesna S. M. and Noor Mahammad, Sk, "Lifeline System for Fisherman", Microelectronics, Electromagnetics and Telecommunications: Proceedings of ICMEET 2015, pp. 583--592, December 2015.
S. Dinesh Kumar, and Noor Mahammad Sk, A Novel Adiabatic SRAM Cell Implementation using Split Level Charge Recovery Logic", in the proceedings of $19^{th}$ IEEE International Symposium on VLSI Design and Test (VDAT), pp. 1-2, June 2015.
S. Dinesh Kumar and Sk Noor Mahammad, "A Novel Ternary Content-Addressable Memory (TCAM) Design Using Reversible Logic", in the proceedings of $28^{th}$ IEEE International Conference on VLSI Design (VLSID), pp. 316-320, Bengalore, Jan. 2015.
S. Dinesh Kumar and Sk. Noor Mahammad, "A Novel SRAM Cell Design Using Reversible Logic", in the proceedings of 3rd International Conference on Eco-friendly Computing and Communication Systems (ICECCS 2014), Surathkal, Dec 2014.
S. Dinesh Kumar and Sk. Noor Mahammad, "A Novel Binary Content Addressable Memory Design using Reversible Logic", in the proceedings of the International Conference on Computing and Communication Technologies (ICCCT 2014), pp. 1-5, Hyderabad, Dec 2014.
M. Mohamed Asan Basiri, and SK Noor Mahammad. "Memory Based Multiplier Design in Custom and FPGA Implementation", Advances in Intelligent Informatics (3rd International Symposium on Intelligent Informatics 2014), Springer International Publishing, pp. 253-265, New Delhi, 2015. [ISI, SCOPUS Indexed]
Asan Basiri M., Samaresh Chandra Nayak, and Noor Mahammad Sk, "Multiplication Acceleration through Quarter Precision Wallace Tree Multiplier", in the proceedings of IEEE International Conference on Signal Processing and Integrated Networks (SPIN), pp. 502-505, New Delhi, February, 2014.
Harshit Srivastava and Noor Mahammad Sk, "A novel Flexible Baseband Processor Architecture Framework", in the proceedings of IEEE International Conference on Signal Processing and Integrated Networks (SPIN), pp. 511-516, New Delhi, February, 2014.
Asan Basiri M and Noor Mahammad Sk, "An efficient hardware based MAC design in digital filters with complex numbers", in the proceedings of IEEE International Conference on Signal Processing and Integrated Networks (SPIN), pp. 475-480, New Delhi, February, 2014.
Sagarika Mohanty and Noor Mahammad Sk, "A novel Interleaver Design for Multimode Communication in WLAN", in the proceedings of IEEE International Conference on Signal Processing and Integrated Networks (SPIN), pp. 286-290, New Delhi, February, 2014.
Veeramani S, Manas Kumar, and Sk Noor Mahammad, "Hybrid Trie based Partitioning of TCAM based Openflow Switches", in the proceedings of 7th IEEE International Conference on Advanced Networks and Telecommunications Systems (ANTS), pp. 1-5, Chennai, December 2013.
Veeramani S, S Rahul Sharma and Sk Noor Mahammad, "Constructing scalable hierarchical switched openflow network using adaptive replacement of flow table management", in the proceedings of 7th IEEE International Conference on Advanced Networks and Telecommunications Systems (ANTS), pp. 1-3, Chennai, December 2013.
Veeramani S, Biraja Nalini Rout, and Noor Mahammad Sk, "Novel Approach to Secure Channel using C-SCAN and microcontroller in Openflow, in the proceedings of 7th IEEE International Conference on Advanced Networks and Telecommunications Systems (ANTS), pp. 1-4, Chennai, December 2013.
Veeramani S, Manas Kumar, and Sk Noor Mahammad, "Minimization of flow table for TCAM based Openflow Switches by Virtual Compression Approach", in the proceedings of 7th IEEE International Conference on Advanced Networks and Telecommunications Systems (ANTS), pp. 1-4, Chennai, December 2013.
K Shravan Kumar, S A Srinivasa Moorthy, Noor Mahammad Sk, "Design of low cost programmable DC power supply unit",in the proceedings of International Conference on Control, Automation, Robotics and Embedded Systems (CARE 2013), pp.1-5, Jabalpur, Dec. 2013.
Praveen Kumar P and Noor Mohammad Sk, "Reconfigurable baseband modulator for Software Defined Radio", in the proceedings of IEEE International Conference on Information \& Communication Technologies (ICT 2013), pp. 189-193, Nagarcoil, April 2013.
Gangothri, T. Manasa, P. K. Sumitha, S. A. S. Moorthy, K. Selvajyothi, and Sk Noor Mahammad, "Design of compact controller and power module for corrosion and marine growth prevention", in the proceedings of 7th IEEE International Conference on Industrial and Information Systems (ICIIS), pp. 1-6, Chennai, August 2012.
Karthik K S, Shyam S, Ramasubramanian N, Shoaib M, Noor Mahammad Sk and Kamakoti V, "A SEU Tolerant CLB RAM for In-Circuit Reconfiguration", in the proceedings of the 12Th IEEE International VLSI Design and Test Symposium (VDAT' 08), pp. 228-238, Bangalore, India, July 2008.
Mohammed Shoaib, Noor Mahammad Sk and Kamakoti V, "A Genetic Approach to Gateless Custom VLSI Design Flow", in the proceedings of 19Th IEEE International Conference on Microelctronics, pp XII-XVIII, Cairo, Egypt, December 2007.
Hari Siva Kumar Sastry, Shyam Shroff, Noor Mahammad Sk and Kamakoti V, "Efficient Building Blocks for Reversible Sequential Circuit Design", in the proceedings of the 49Th IEEE International Midwest Symposium on Circuits and Systems, (MWSCAS'06), pp 437-441, August 2006.
Noor Mahammad Sk, Siva Kumar Sastry H, Shyam Shroff and Kamakoti V, "Constructing Online Testable Circuits using Reversible Logic", in the proceedings of 10Th IEEE International VLSI Design and Test Symposium (VDAT 2006), pp 373-383, Goa, India, August 2006.
Noor Mahammad Sk, Chandrasekhar V, Muralidaran V, Kamakoti V and Vijaykrishnan N, "Reduced Triple Modular Redundancy for Tolerating SEUs in SRAM-based FPGAs", in the proceedings of the 8Th annual MAPLD International Conference on Programmable Logic Devices and Technologies, paper no. 204, Washington D.C., USA. September 2005. Organized by NASA, USA.