Professor

Prof. Binsu J Kailath

Email: bkailath@iiitdm.ac.in | Ph: +91-44-27476341

Room: 108 E

Prof. Binsu J Kailath

Education

  • IIT Madras PhD in Ultra Thin Oxide MOS Devices, Dept. of Electrical Engineering

    Chennai 2003 - 2007

  • IIT Madras M.Tech. in MicroElectronics and VLSI Design, Dept. of Electrical Engineering

    Chennai 1999 - 2001

  • University of Calicut B.Tech. in Electronics and Communication Engineering

    Kerala 1988 - 1992

Research Interests

  • Spiking Neural Networks
  • Non-volatile Memory-based In-Memory Computing
  • Application of Neuromorphic Circuits in healthcare domain
  • Mixed Signal IC Design
  • Microelectronics and MEMS

Work Experience

  • Teaching

    • Faculty Member in Electronics Engineering in College of Engineering, Chengannur, Kerala, for 8 years
    • Faculty Member in Electronics Engineering in IIITDM Kancheepuram from Oct 2008
  • Research

    • IIITDM:
    • In-Memory Computing (Ongoing)
    • Neuromorphic Circuit Design (Analog and Digital Circuit Design - Ongoing)
    • Switch Capacitor circuit simulator Development (Completed)
    • Sigma Delta ADC (Completed)
    • Composite PFD-based PLL (Completed)
    • Fabrication, characterization and extraction of conduction Mechanisms in SiC MIS Capacitors with High-k dielectrics of which fabrication and characterization was carried out in Centre for Nano Science and Engg, IISc Bangalore through INUP (Completed)
    • IIT Madras
    • Novel Oxidation Techniques for improvement in the Electrical properties of Ultra-thin SiO2 for VLSI technology, Guided by Prof. Nandita DasGupta in Microelectronics and MEMS Laboratory, Dept. of Electrical Engineering, IIT Madras (Completed)
    • Study of Novel gate oxidation techniques for future MOS devices (Completed)
    • Study of high-k gate dielectrics for future MOS devices (completed)
    • Study of Laser Induced Oxidation as a viable technique to grow ultra-thin SiO2 (completed)
    • Study of Rapid thermal Oxidation technique to grow ultra-thin SiO2 (Completed)
    • Optimization of HNO3 Vapour oxidation technique to grow ultra-thin SiO2 (Completed)
    • Study of the effect of phosphorus doping on passivation of grain boundaries in poly Si TFTs under the guidance of Late Professor K.N. Bhat, the Great Professor of Semiconductors and my most Respected and Beloved Professor. (Completed)